Thiết kế D-FF

library IEEE;
use IEEE.STD_LOGIC_1164.all;

entity Ex_DFF is
port(
d,rst,clk : in STD_LOGIC;
q : out STD_LOGIC
);
end Ex_DFF;

architecture Ex_DFF of Ex_DFF is
begin
process(clk,rst,d)
begin
if(clk'event and clk='1') then
if(rst='1') then
q<='0';
else
q<=d;
end if;
end if;
end process;

end architecture Ex_DFF;